Pre-Seed · Building the future of RAN

Replacing DSP in the
Radio Unit with
Neural Inference

A single 730K-parameter neural receiver replaces three legacy DSP blocks — channel estimation, equalization, and demapping — directly inside the radio unit.

10-20× Less Fronthaul
3-5× Less Power
+10 dB Ch. Est. Gain
~150 mW Total Power

The RAN Baseband Stack
Hasn't Changed Since 3G

Today's O-RAN 7.2x split treats the radio unit as a dumb RF frontend. All L1 intelligence sits in the DU, connected by expensive dedicated fiber.

📡

Massive Fronthaul

Raw I/Q samples per antenna × subcarrier over dedicated eCPRI fiber. Scales linearly with antennas.

25-50 Gbps

Power-Hungry DSP

LMMSE matrix inversions and K-best tree search run iteratively on every subframe, burning massive compute.

500-700 mW
🔧

Rigid Pipeline

Three separate blocks — channel estimation, MIMO equalization, demapping — each requiring per-scenario reconfiguration.

3 blocks × N configs

One Neural Receiver
Replaces Three DSP Blocks

A CNN + GNN architecture (730K params, INT8) jointly performs channel estimation, equalization, and demapping in a single forward pass — inside the radio unit.

Traditional O-RAN 7.2x
Antenna → RF → ADC + FPGA
↓ eCPRI 25-50 Gbps fiber
DU: Channel Estimation (LMMSE)
DU: MIMO Equalizer (K-Best)
DU: Demapper (QAM → LLR)
DU: LDPC Decoder
25-50 Gbps
Fronthaul
500-700 mW
Baseband Power
AI-Enhanced Smart RU
Antenna → RF → ADC + FPGA (FFT)
↓ Resource grid
★ Neural Receiver (CNN+GNN, INT8)
Joint ch.est + equalization + demapping
↓ LLRs only ~2 Gbps
Lightweight DU: LDPC Decode only
~2 Gbps
Fronthaul
~150 mW
Baseband Power

FPGA Prototype →
Hardcoded Inference Silicon

Validate on FPGA first, then deploy on purpose-built inference silicon that compiles the full forward pass into fixed logic.

Phase 1 · Pre-Seed

FPGA Validation

  • End-to-end neural receiver on Xilinx/AMD FPGA
  • Real channel data validation
  • 730K params, INT8, single forward pass
  • Prove fronthaul reduction + BER parity
  • Working demo in 6-9 months
Phase 2 · Series A

Production Silicon

  • Hardcoded circuit-based inference silicon
  • Full forward pass compiled to fixed logic
  • Zero software overhead, sub-1W power
  • 330×+ throughput vs GPU at matched clock
  • Deliverable as ASIC-ready IP core

The Industry Just
Validated AI-RAN

The biggest names in wireless just committed billions to AI in the RAN. But nobody is purpose-building the inference layer for the radio unit itself.

🤝

NVIDIA + Nokia: $1B Partnership

NVIDIA committed $1B equity investment in Nokia for commercial AI-RAN products on the Aerial RAN Computer Pro platform.

📶

SoftBank: GPU-Accelerated vRAN

Validated fully software-defined, GPU-accelerated AI-RAN delivering 16-layer massive MU-MIMO outdoors.

📈

$34B → $676B Market

5G infrastructure market projected to reach $675.9B by 2034. Private 5G networks growing at 65.4% CAGR through 2030.

🎯

The Gap: Nobody Owns the RU Layer

Big players validate at DU/cloud level. Nobody is building purpose-built neural inference for the radio unit itself. That's us.

Builder-Operator +
Domain Scientist

Both full-time. Complementary: Usama ships products and exits. Yasir knows exactly what to build.

CEO

Usama Zaidi

The Builder & Operator
  • 3× founder with exits
  • Epik → acquired by Granite Telecom (4th largest US telecom)
  • Senior Architect, Google Fiber — AI/ML for network anomaly detection
  • CTO SpeechTrans — world's first real-time phone translation
  • Deep systems: Linux internals, FPGA/SDR, VoIP/SS7
linkedin →
CTO

Yasir Ahmed

The Domain Scientist
  • 20+ years wireless PHY engineering
  • Virginia Tech MPRG under Ted Rappaport — Space-Time Block Codes
  • Qualcomm — physical-layer modem testing, Cloud ML
  • Founded RAYmaps — mmWave ray-tracing, RIS coverage engines
  • 12 IEEE publications, Springer book on wireless communications
linkedin →

Let's Build the Neural RAN Together

We're raising a pre-seed to build the FPGA prototype. Investors, partners, and engineers — we'd love to talk.